Remoworker Remoworker
Cadence Design Systems

Principal Application Engineer - Verification

Cadence Design Systems
Remote Full-time China
Principal-Software-QA-Engineer Senior-Verification-Engineer Software-Verification-Engineer QA-&-Verification-Engineer Principal-QA-Engineer Verification-&-Validation-Engineer
Apply on Himalayas →

You'll be redirected to the original listing.

Description

Role Overview

We are seeking a highly skilled Senior SoC Verification Engineer with 6+ years of hands-on experience in complex SoC verification. The ideal candidate has strong expertise in UVM-based environments, deep understanding of SoC architecture, and practical experience verifying application processors, AI accelerators, or other high-performance chips.

What You Will Do

Develop and execute verification plans for complex SoC subsystems and full-chip environments. Build, enhance, and maintain UVM-based verification environments, including agents, sequences, scoreboards, and coverage models.

Why It Might Be a Fit

This role focuses on technical depth rather than people management, requiring strong ownership, problem-solving ability, and broad protocol knowledge. Ability to work effectively in cross-functional and multi-site teams. Strong communication skills and ability to articulate technical issues clearly.

Requirements

  • Bachelor’s/Master’s degree in Electrical Engineering, Computer Engineering, or related field
  • 6+ years of hands-on experience in digital SoC verification
  • Strong proficiency in SystemVerilog, UVM, constrained-random verification, and coverage-driven methodology
  • Solid understanding of SoC architecture, memory hierarchy, cache systems, interconnects, and coherency concepts
  • Broad familiarity with industry-standard protocols such as AXI, AHB, APB, PCIe, USB, DDR, LPDDR, MIPI, Ethernet, or similar
  • Strong debugging skills using waveform tools, assertions, and simulation logs
  • Hands-on experience with simulation, emulation, or acceleration platforms

Originally posted on Himalayas